Intel Tackles Malware Related to Memory Security at Hardware LevelIntel Tackles Malware Related to Memory Security at Hardware Level
New control-flow enforcement technology will become available with upcoming Tiger Lake mobile processor, chipmaker says.
June 15, 2020
Intel has announced new CPU-level capabilities designed to protect apps against threats that take advantage of buffer overflow and other common vulnerabilities related to memory security.
Intel's new control-flow enforcement technology (CET) will first become available with the chipmaker's upcoming Tiger Lake mobile processor and eventually be rolled out to other processor families.
Tom Garrison, vice president of Intel's client computing group, says CET protects against what are known as control-flow hijacking attacks, a technique used by many malware classes. He describes these as attacks that manipulate the manner in which a written piece of code operates in order to trigger a very different outcome from what was originally intended.
"The analogy I like to use is the word "there,'" Garrison says. "We know what it means. But if you choose to ignore the first letter, you get 'here,' which has a very different meaning." Similarly, dropping every second letter in the word "there" would result in "tee," which again has a very different meaning from the original, he says.
In control-flow attacks, adversaries manipulate code in a similar way to achieve malicious outcomes, he says. But because they are using code that is supposed to be safe, their tampering is not readily detectable by software. "CET solves a class of attacks that has been plaguing the industry for sometime," he says.
At a high level, CET uses two techniques to prevent legitimate code from being used in control-flow attacks. One is called "indirect branch tracking" and the other is "shadow stack." According to Garrison, the indirect tracking capability ensures that when code is executing and needs to jump to a new area of code, it only lands on a so-called end branch, or the area in the code where it is supposed to land.
"Think about it like a pond with lily pads on it," he says. "If you are a frog, you can jump from lily pad to lily pad because that is where you are supposed to land." If it jumps to where there is no lily pad, the error would be immediately detected and flagged, Garrison says.
Shadow stack is designed to address memory-security issues that allow attackers to hijack what are known as return addresses and point them to an attacker-defined address. Shadow stack keeps a copy of all return addresses so if an attacker manipulates an original return address, the change is immediately detected and flagged.
"These types of attack methods are part of a class of malware referred to as memory safety issues, and include tactics such as the corruption of stack buffer overflow and use-after-free," Garrison said in a blog announcing CET. More than 60% of the nearly 1,100 zero-day bugs listed by Trend Micro's Zero Day Initiative since the beginning of 2019 fall into this category, he noted.
Working with Microsoft
Intel published a white paper with CET specifications back in 2016. Since then it has been working with Microsoft to ensure that Windows 10 and developer tools are ready to take advantage of CET when it becomes available with the Tiger Lake processor family.
Earlier this year, Microsoft outlined its support for Intel CET via a Windows 10 capability called "hardware-enforced stack protection." The feature works only on Intel chipsets that are compliant with CET specifications and is designed to alleviate concerns related to memory vulnerabilities.
In a blog, Microsoft described hardware-enforced stack protection as an option that developers can choose to use to implement hardware-level protections against control-flow attacks.
"We will provide ongoing guidance on how to re-build your application to be shadow stacks compliant," the company said. "This protection will be a major step forward in our continuous efforts to make Windows 10 one of the most secure operating system for our customers."
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