Processor Morphs Its Architecture to Make Hacking Really Hard

Researchers create a processor that uses encryption to modify its memory architecture during runtime, making it very difficult for hackers to exploit memory-based vulnerabilities.

4 Min Read

Exploiting memory leaks, injecting code into processes, and a variety of side-channel attacks could become much more difficult to pull off if a technique for creating a "morphable" processor architecture gains widespread adoption.

The research effort, known as Morpheus, is a set of architectural changes to processors that implement two protections: the randomization of processor elements critical to program execution and the periodic encryption of those elements, a process called "churn." The first technique allows a processor to change its architecture, forcing attackers to reverse engineer such changes before exploiting a vulnerability. The second technique changes the architecture quickly enough to prevent attackers from successfully reverse engineering its execution.

The new architecture could help interrupt the infinite cycle of vulnerability discovery and patching by making vulnerabilities less useful, says Todd Austin, a professor of electrical engineering and computer science at the University of Michigan and a leader of the Morpheus project.

"The vast majority of work in the computer-science space is 'how do I find and how do I fix vulnerabilities?'" he says. "We are on the other side. Our technology recognizes that an exploit is different than a vulnerability, so we ask, 'what are the juicy bits that attackers want to get access to after they have found a vulnerability?" — that's pointers, code, address space, organization, and a variety of other things, and those are what we encrypt."

The multiuniversity effort, whose team also includes members from Princeton University and the University of Texas at Austin, is part of a program run by the Defense Advanced Research Projects Agency (DARPA) and its System Security Integration Through Hardware and Firmware (SSITH) program. Between last July and October, the SSITH group ran a bug bounty contest — and in keeping with the Star Wars theme, called it Finding Exploits to Thwart Tampering (FETT) — pitting almost 600 hackers against various processor designs.

Each platform had to implement the open source processor instruction set RISC-V while running software with known vulnerabilities. The red teams — composed of both government and freelance hackers — did not have to find vulnerabilities but find ways to exploit known vulnerabilities on the hardware platforms. While the attackers found 10 vulnerabilities in various candidate architectures, Morpheus is among the designs that repelled all attacks.

"FETT challenged performers and greatly matured the architectures in development," Keith Rebello, the DARPA program manager leading SSITH and FETT initiatives, said in a statement earlier this year. "Several of the research teams were driven to document the use and benefits of their security frameworks in a rigorous and understandable way, which will ultimately help third parties understand and adopt these secure processors for operational use."

The researchers noted that attackers will often make use of undefined semantics — places in the program where the behavior of the code is not defined, such as buffer overflows and return-oriented programming. The Morpheus project identified these undefined semantics and created sets, or an ensemble, of moving-target defenses (EMTDs) to protect against them. On a regular basis, then, the processors encrypts the pointers to the EMTDs, essentially creating a new memory architecture about which the attacker has no information — a process called "churn."

Originally, the researchers rekeyed every 100 milliseconds, causing significant processor overhead — up to 10%. In the processor created for DARPA test last summer, the researchers extended the churn cycle to seconds, cutting the overhead to less than 2%.

"What churn mechanism does is it rekeys all the defenses so that any probing or reverse engineering or side channeling that happens, basically all that progress is lost," he says. "Realistically, unless they are going to mechanize their attacks, it is pretty difficult for a human to work through the problem in under a minute."

The researchers have improved their design and will release a second architecture, Morpheus 2, in a future paper.

The technology uses an encryption process developed by the National Security Agency known as SIMON, a lightweight block cipher that is specifically intended for Internet of Things devices to run quickly in hardware. While significant controversy has swirled around SIMON and a second cipher, SPECK, after the International Standards Organization (ISO) rejected them in 2018, the use of SIMON in the Morpheus processor design only requires the cipher to protect data for less than a minute, under the current specifications.

The proliferation of the Internet of Things devices, which are often not able to run extensive software security code, means that much of the security for these lightweight systems will have to be on the processor.

The Morpheus architecture, as well as other processor designs that survived the FETT contest, should protect against exploits such as buffer errors, privilege escalations, resource management attacks, information leakage attacks, numeric errors, code injection attacks, and cryptographic attacks.

About the Author(s)

Robert Lemos, Contributing Writer

Veteran technology journalist of more than 20 years. Former research engineer. Written for more than two dozen publications, including CNET, Dark Reading, MIT's Technology Review, Popular Science, and Wired News. Five awards for journalism, including Best Deadline Journalism (Online) in 2003 for coverage of the Blaster worm. Crunches numbers on various trends using Python and R. Recent reports include analyses of the shortage in cybersecurity workers and annual vulnerability trends.

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