Intel's SGX Vulnerable to Spectre-Like Flaw

Intel's SGX technology, which is used by several large cloud providers, is subject to its own Spectre-like vulnerability. However, this flaw seems much easier to fix.

Larry Loeb, Blogger, Informationweek

March 5, 2018

3 Min Read

Software Guide Extensions (SGX) is a method Intel introduced into its new newer chips to create a secure enclave area that developers believed would be able to isolate the program and its data from the environment that surrounds it.

The environment that it was protecting the program against included the operating systems and hypervisors, along with other system software.

In fact, Microsoft like the idea so much that it began supporting it in Azure -- the company's public cloud service. This was supposed to act as a barrier against any potentially malicious staff at the cloud installation. (See Cloud Security Is a Shared Responsibility .)

However, the Spectre class of predictive attacks have sort of made a mess of that idea.

(Source: Intel)

(Source: Intel)

Researchers from Ohio State published a paper last month showing how SGX can be breached in a side channel attack. They name the attack method SgxPectre, but have not released a catchy mascot logo to accompany it at present.

The researchers note that this naming is necessary to "highlight the important differences between them, including the threat model, the attack vectors, the techniques to win the race conditions, and the consequences of the attacks."

The report goes on to describe the method as one that "exploits the race condition between the injected, speculatively executed memory references, which lead to side-channel observable cache traces, and the latency of the branch resolution".

The method looks at hardware specifics as part of the attack.

The branch prediction units that are used in the enclave were found by the researchers not to be cleansed properly when the enclave was entered. This leads the researchers to assert that: "Code outside the targeted enclave (either running in the unprotected memory region or in another enclave) can manipulate the targets the branch prediction inside the targeted enclave."

There is also implicit caching going on.

This is caused by the speculatively executed instructions not rolling back after these kinds of instructions are discarded. So, that will mean the speculatively executed instructions -- even when they have never been committed to memory -- can lead to cache state changes which are observable by the adversary.

The researchers also found that the Intel Software Development Kits -- such as Rust and Graphene -- contain a code pattern that enables these kinds of attacks in the code that they produce.

The good news in all of this is that if the CPU has been patched with the newest microcode against Spectre Variant 2, the patch will protect against this attack as well. Use of the IBRIS instruction was said by the researchers to stop the kind of CPU behavior that exposes data. Developers may want to make sure that the CPU they are executing on -- say, in the cloud -- is at the correct version number for a patch, since microcode can be undone at run time. (See Intel Offering New Microcode to Fix Spectre & Meltdown.)

Intel noted that an upgrade to its SDK, scheduled for March 16, will change the patterns in the code it generates, which will eliminate that aspect to the problem.

Intel still has a load of fallout to deal with from Spectre and Meltdown, but the company may have dodged a huge bullet this time.

Related posts:

— Larry Loeb has written for many of the last century's major "dead tree" computer magazines, having been, among other things, a consulting editor for BYTE magazine and senior editor for the launch of WebWeek.

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About the Author(s)

Larry Loeb

Blogger, Informationweek

Larry Loeb has written for many of the last century's major "dead tree" computer magazines, having been, among other things, a consulting editor for BYTE magazine and senior editor for the launch of WebWeek. He has written a book on the Secure Electronic Transaction Internet protocol. His latest book has the commercially obligatory title of Hack Proofing XML. He's been online since uucp "bang" addressing (where the world existed relative to !decvax), serving as editor of the Macintosh Exchange on BIX and the VARBusiness Exchange. His first Mac had 128 KB of memory, which was a big step up from his first 1130, which had 4 KB, as did his first 1401. You can e-mail him at [email protected].

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