A new DARPA contract with Tortuga Logic intends to field chip emulation systems to test security before processors hit manufacturing.
The Defense Advanced Research Projects Agency (DARPA) has signed a contract with Tortuga Logic to develop hardware that integrates Tortuga Logic’s hardware security models with commercial emulation platforms to fully test an entire chip design running a full software stack.
As part of the contract, participants of the DARPA System Security Integrated Through Hardware and Firmware (SSITH) program will have early access to the emulation platforms that come from the research. The goal of the SSITH program is to develop hardware that is inherently more secure from the design process forward.
Tortuga Logic will build the emulation system on their two software suites, Prospect and Unison. The project will use the Palladium platform from Cadence Design Systems for the emulation component and will utilize the RISC-V processor architecture and sample design for initial prototyping and testing.
Avoiding a repeat of the Spectre and Meltdown vulnerabilities by helping implement a secure development lifecycle is a key goal of the project. The Meltdown and Spectre and related vulnerabilities affecting Intel, ARM, and AMD chips are examples of hardware security flaws that are exploited once chips are in the wild.
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